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  Low-power NoC for High-performance SoC Design (System-on-chip Design and Technologies) (Hardback) By (author) Hoi-Jun Yoo, By (author) Jun Kyong Kim, By (author) Kangmin Lee

  

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  Short Description for Low-power NoC for High-performance SoC DesignOffers knowledge and examples of how to use NoC in the design of SoC. This resource explains how to optimize communication through NoC. It presents concepts, such as models of computation and communication - computation partitioning, in a manner accessible to laypeople.
  Full description

  • Publisher: CRC Press Inc
  • Published: 31 March 2008
  • Format: Hardback 304 pages
  • See: Full bibliographic data
  • Categories: Electronics Engineering | Circuits & Components | Systems Analysis & Design
  • ISBN 13: 9781420051728 ISBN 10: 1420051725

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Full description for Low-power NoC for High-performance SoC Design

• Designers are always challenged to interface various blocks within a system of chips to meet performance objectives while avoiding bottlenecks as more CPU and DSP cores are added. The efficient networking of various blocks is an on-going issue that is addressed by the authors of this practical work. Focusing on the real chip implementation of SoC by using NoC, they explore the latest techniques and compare industry-available solutions from both a technical and business perspective. While other works on this subject discuss theory, this volume shows readers how to design advanced ICs. It also teaches a new trend in IC design technology.